It is known to test integrated circuits with respect to their robustness in case of an electrostatic discharge (ESD) event. Several models are known to perform such a test on a device level, e.g., according to the human body model or to the charged device model.
Further, ESD robustness tests can be performed on an entire electronic system, which typically comprises one or more integrated circuits and additional peripheral components, external connections, a housing, or the like. Hereinafter, such tests will be referred to as system-level tests. One standard for system-level tests is defined by IEC 61000-4-2.
However, the above methods do not allow to qualify an integrated circuit with respect to its behavior if the electronic system using the integrated circuit is subjected to an ESD event unless the entire electronic system is set up. At the same time, this behavior constitutes information useful with respect to designing the electronic system. In some cases, it may even be required to redesign the integrated circuit to meet system-level ESD specifications.